fn3183 rev 5.00 page 1 of 8 december 3, 2015 fn3183 rev 5.00 december 3, 2015 ICL7673 automatic battery back-up switch datasheet the intersil ICL7673 is a m onolithic cmos battery backup circuit that offers unique pe rformance advantages over conventional means of switchi ng to a backup supply. the ICL7673 is intended as a low-cost solution for the switching of systems between t wo power supplies; main and battery backup. the main application is keep-alive-battery power switching for use in volatile cmos ra m memory systems and real time clocks. in many applications this circuit will represent a low insertion volt age loss between the supplies and load. this circuit features l ow current consumption, wide operating voltage range, and exceptionally low leakage between inputs. logic outputs are provided that can be used to indicate which supply is con nected and can a lso be used to increase the power switchi ng capability of the circuit by driving external pnp transistors. features ? automatically connects outp ut to the greater of either input supply voltage ? if main power to external e quipment is lost, circuit will automatically conne ct battery backup ? reconnects main po wer when restored ? logic indicator signalin g status of main power ? low impedance connection switches ? low internal power consumption ? wide supply range: . . . . . . . . . . . . . . . . . . . 2.5v to 15v ? low leakage between inputs ? external transistors may be added if very large currents need to be switched ? pb-free plus anneal available (rohs compliant) applications ? on board battery backup for real-time clocks, timers, or volatile rams ? over/under voltage detector ? peak voltage detector ? other uses: - portable instruments, portable telephones, line operated equipment pinout ICL7673 (soic, pdip) top view ordering information part number temp. range (c) package pkg. dwg. # ICL7673cpa no longer available or supported. recommended replacement ICL7673cpaz 0 to 70 8 ld pdip e8.3 ICL7673cpaz (see note) 0 to 70 8 ld pdip* (pb-free) e8.3 ICL7673cba no longer available or supported. recommended replacement ICL7673cbaza-t 0 to 70 8 ld soic (n) m8.15 ICL7673cbaza (see note) 0 to 70 8 ld soic (n) (pb-free) m8.15 ICL7673cbaza-t (see note) 0 to 70 8 ld soic (n) (pb-free) m8.15 *pb-free pdips can be used for through hole wave solder processing only. they are not intended for use in reflow solder processing applications. note: intersil pb-free plus anneal products employ special pb-fr ee material sets; molding compounds/d ie attach materials and 100% matte tin plate termination fini sh, which are rohs compliant an d compatible with both snpb and pb-free soldering operations. int ersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. v o v s s bar gdn 1 2 3 4 8 7 6 5 v p nc p bar nc
ICL7673 fn3183 rev 5.00 page 2 of 8 december 3, 2015 functional block diagram p1 p2 v s gnd p bar s bar v o + - v p v p > v s , p1 switch on and p bar switch on v s > v p , p2 switch on and s bar switch on
ICL7673 fn3183 rev 5.00 page 3 of 8 december 3, 2015 absolute maximum ratings thermal information input supply (v p or v s ) voltage . . . . . . . . . . . . gnd - 0.3v to +18v output voltages p bar and s bar . . . . . . . . . . . gnd - 0.3v to +18v peak current input v p (at v p = 5v) (note 1) . . . . . . . . . . . . . . . . . . . . . . . 38 ma input v s (at v s = 3v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30ma p bar or s bar . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150ma operating conditions temperature range: ICL7673c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0c to 70c thermal resistance (typical, note 2) ? ja (c/w) ? jc (c/w) pdip package* . . . . . . . . . . . . . . . . . . 150 n/a plastic soic package . . . . . . . . . . . . . 180 n/a maximum storage temperature. . . . . . . . . . . . . . . . . -65 c to 150c maximum lead temperature (soldering, 10sec). . . . . . . . . . .300c (soic - lead tips only) *pb-free pdips can be used for through hole wave solder process ing only. they are not intended for use in reflow solder processing applications. caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. notes: 1. derate above 25c by 0.38ma/c. 2. ? ja is measured with the component mounted on an evaluation pc boa rd in free air. electrical specifications t a = 25c unless otherwise specified parameter symbol test conditions min typ max units input voltage v p v s = 0v, i load = 0ma 2.5 - 15 v v s v p = 0v, i load = 0ma 2.5 - 15 v quiescent supply current i+ v p = 0v, v s = 3v, i load = 0ma - 1.5 5 ? a switch resistance p1 (note 1) r ds(on) p1 v p = 5v, v s = 3v, i load = 15ma - 8 15 ? at t a = +85c - 16 - ? v p = 9v, v s = 3v, i load = 15ma - 6 - ? v p = 12v, v s = 3v, i load = 15ma - 5 - ? temperature coefficient of switch resistance p1 t c(p1) v p = 5v, v s = 3v, i load = 15ma - 0.5 - %/c switch resistance p2 (note 1) r ds(on) p2 v p = 0v, v s = 3v, i load = 1ma - 40 100 ? at t a = +85c - 60 - ? v p = 0v, v s = 5v, i load = 1ma - 26 - ? v p = 0v, v s = 9v, i load = 1ma - 16 - ? temperature coefficient of switch resistance p2 t c(p2) v p = 0v, v s = 3v, i load = 1ma - 0.7 - %/c leakage current (v p to v s )i l(ps) v p = 5v, v s = 3v, i load = 10ma - 0.01 20 na at t a = +85c - 35 - na leakage current (v p to v s )i l(sp) v p = 0v, v s = 3v, i load = 10ma - 0.01 50 na at t a = +85c - 120 - na open drain output saturation voltages v opbar v p = 5v, v s = 3v, i sink = 3.2ma, i load = 0ma - 85 400 mv at t a = 85c - 120 - mv v p = 9v, v s = 3v, i sink = 3.2ma, i load = 0ma - 50 - mv v p = 12v, v s = 3v, i sink = 3.2ma i load = 0ma -40- mv open drain output saturation voltages v osbar v p = 0v, v s = 3v, i sink = 3.2ma, i load = 0ma - 150 400 mv at t a = +85c - 210 - mv v p = 0v, v s = 5v, i sink = 3.2ma i load = 0ma - 85 - mv v p = 0v, v s = 9v, i sink = 3.2ma i load = 0ma - 50 - mv
ICL7673 fn3183 rev 5.00 page 4 of 8 december 3, 2015 output leakage currents of p bar and s bar i lpbar v p = 0v, v s = 15v, i load = 0ma - 50 500 na at t a = +85c - 900 - na i lsbar v p = 15v, v s = 0v, i load = 0ma - 50 500 na at t a = +85c - 900 - na switchover uncertainty for complete switching of inputs and open drain outputs v p - v s v s = 3v, i sink = 3.2ma, i load = 15ma - ? 10 ? 50 mv note: 3. the minimum input to output voltage can be determined by mult iplying the load current by the switch resistance. electrical specifications t a = 25c unless otherwise specified (continued) parameter symbol test conditions min typ max units typical performance curves figure 1. on-resistance switch p1 as a function of input voltage v p figure 2. on-resistance switch p2 as a function of input voltage v s figure 3. supply current as a function of supply voltage figure 4. p bar or s bar saturation voltage as a function of output current 100 10 1 02 46810121416 i load = 15ma on-resistance p1 ( ? ) input voltage v p (v) on-resistance p2 ( ? ) input voltage v s 100 10 1 0246810 i load = 1ma supply current ( ? a) -40c 25c 85c 1 0.8 0.6 0.4 0.2 02 46 8 10121416 supply voltage (v) output saturation voltage (v) 5 4 3 2 1 0 40 80 120 140 180 v o = 3v output current (ma) v o = 5v v o = 9v v o = 12v v o = 15v
ICL7673 fn3183 rev 5.00 page 5 of 8 december 3, 2015 detailed description as shown in the functional diagram, the ICL7673 includes a comparator which senses the input voltages v p and v s . the output of the compara tor drives the first inverter and the open-drain n-channel transistor p bar . the first inverter drives a large p-channel switch, p 1 , a second inverter, and another open-drain n-channel transistor, s bar . the second inverter drives another l arge p-channel switch p 2 . the ICL7673, connected to a main and a backup power supply, will connect the supply of greater potential to its output. the circuit provides break-before-make switch action as it switches from main to backup power in the event of a main power supply failure. for proper operation, inputs v p and v s must not be allowed to float, and, the difference in the two supplies must be greater than 50mv. the leakage current through the reverse biased parasitic diode of switch p 2 is very low. output voltage the output operating voltage r ange is 2.5v to 15v. the insertion loss between either input and the output is a function of load current, input v oltage, and temperature. this is due to the p-channels being operated in their triode region, and, the on-resistance of the switches is a function of output voltage v o . the on-resistance of the p-channels have positive temperature coefficients, and therefore as temperature increase s the insertion loss also increases. at low load currents the output vol tage is nearly equal to the greater of the two inputs. the maximum voltage drop across switch p 1 or p 2 is 0.5v, since above this voltage the body- drain parasitic diode will become forward biased. complete switching of the in puts and open-drain outputs typically occurs in 50 ? s. input voltage the input operating voltage range for v p or v s is 2.5v to 15v. the input supply voltage (v p or v s ) slew rate should be limited to 2v per microsecond t o avoid potential harm to the circuit. in line-operated systems, the rate-of-rise (or fall) o f the supply is a func tion of power supply design. for battery applications it may be necessary to use a capacitor between the input and ground pins to limit the rate-of-rise of the supply voltage. a low-impedance capacitor such as a 0.047 ? f disc ceramic can be used to reduce the rate-of-rise. status indicator outputs the n-channel open drain output transistors can be used to indicate which supply is connect ed, or can be u sed to drive external pnp transistors to increase the power switching capability of the circuit. whe n using external pnp power transistors, the output curre nt is limited by the beta and thermal characteristics of t he power transistors. the application section details the use of external pnp transistors. applications a typical discrete ba ttery backup circuit is illustrated in fig ure 6. this approach requires seve ral components, substantial printed circuit board space, and high labor cost. it also consumes a fairly high qui escent current. the ICL7673 battery backup circuit, illustrated in figure 7, will often rep lace such discrete designs and off er much better performance, higher reliability, and lower system ma nufacturing cost. a trickle charge system could be implemented with an additional resistor and diode as shown in figure 8. a complete low power ac to regulated dc system can be implemented using the ICL7673 and icl7663s micropower voltage regulator as shown in figure 9. i s leakage current input v p (v) 02456 81012 1ma 100ma 10na 1na 1000pa 10pa 1pa i load = 10ma v s = 0v 85c 25c figure 5. i s leakage current v p to v s as a function of input voltage +5v primary dc power gnd nicad battery stack v o +5v or +3v status indicator figure 6. discrete battery backup circuit
ICL7673 fn3183 rev 5.00 page 6 of 8 december 3, 2015 applications for the ICL7673 i nclude volatile semiconductor memory storage systems, real- time clocks, timers, alarm systems, and over/under the voltage detectors. other systems requiring dc power when the master ac line supply fails can also use the ICL7673. a typical application, as illustr ated in figure 12, would be a microprocessor system requiring a 5v supply. in the event of primary supply failure, the system is powered down, and a 3v battery is employed to main tain clock or volatile memory data. the main and backup s upplies are c onnected to v p and v s , with the circuit output v o supplying power to the clock or volatile memory. the i cl7673 will sense the main supply, when energized, to be o f greater potential than v s and connect, via its internal mos switches, v p to output v o . the backup input, v s will be disconnected internally. in the event of main supply failure, the circuit will sense that the backup supply is now the greater potential, disconnect v p from v o , and connect v s . figure 11 illustrates the us e of external pnp power transistors to increase the pow er switching ca pability of the circuit. in this application the output current is limited by t he beta and thermal characteris tics of the power transistors. if hysteresis is desired for a particular low power application , positive feedback can be a pplied between the input v p and open drain output s bar through a resistor a s illustrated in figure 12. for high power appl ications hysteresis can be applied as shown in figure 13. the ICL7673 can also be used as a clipping circuit as illustrated in figure 14. wi th high impedance loads the circuit output will be nearly eq ual to the greater of the two input signals. v p v o v s gnd pbar 8 2 1 6 v o +5v or +3v r i status indicator lithium battery gnd +5v primary supply 4 + - figure 7. ICL7673 battery backup circuit v p v o v s gnd 8 2 1 v o +5v or +3v rechargeable battery gnd +5v primary supply 4 r c + - figure 8. application requiring rechargeable battery backup figure 9. power supply for low power portable ac to dc systems figure 10. typical microprocessor memory application fuse 120/240 vac bridge rectifier battery stack gnd v o v s v p 1 8 2 4 2 8 4 6 stepdown transformer r 3 r 2 r 1 c 1 d 1 + - ICL7673 battery back-up icl7663 regulator power fail detector microprocessor volatile ram interrupt signal ICL7673 backup circuit +5v main power v o v p v s + -
ICL7673 fn3183 rev 5.00 page 7 of 8 december 3, 2015 figure 11. high current battery backup system figure 12. low current battery backup system with hysteresis figure 13. high current backup system with hysteresis external equipment v o gnd 8 23 6 v p v s nc p- s- 1 pnp pnp main supply 3v backup supply + - (note 4) note 4. > 1m w r 3 r 4 r 1 r 2 ICL7673 v o gnd 8 23 v p v s s- main supply + - battery backup r s r f ICL7673 gnd gnd external equipment 1 4 8 23 6 v p v s nc p- s- pnp pnp main supply backup supply r s r f r 2 r 4 r 1 r 3 ICL7673 +v supply gnd main + -
fn3183 rev 5.00 page 8 of 8 december 3, 2015 ICL7673 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 1999-2015. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. about intersil intersil corporation is a leading provider of innovative power management and precision analog solutions. the company's produc ts address some of the largest marke ts within the industrial and i nfrastructure, mobile computing and high-end consumer markets. for the most updated datasheet, application no tes, related documentation and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggesti ons for improving this datashe et by visiting www.intersil.com/ask . reliability reports are also a vailable from our website at www.intersil.com/support figure 14. clippling circuits v p v s v o gnd v s v o v p ICL7673 revision history the revision history provided is for informational purposes onl y and is believed to be accurate, but not warranted. please go to the web to make sure that you have the latest revision. date revision change december 3, 2015 fn3183.5 added revision history beginning with r ev 5. added about intersil verbiage. updated ordering information on page 1
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